/*
 * Generated by asn1c-0.9.29 (http://lionet.info/asn1c)
 * From ASN.1 module "NR-RRC-Definitions"
 * 	found in "asn/nr-rrc-15.6.0.asn1"
 * 	`asn1c -fcompound-names -pdu=all -findirect-choice -fno-include-deps -gen-PER -no-gen-OER -no-gen-example -D rrc`
 */

#ifndef	_ASN_RRC_Phy_ParametersFRX_Diff_H_
#define	_ASN_RRC_Phy_ParametersFRX_Diff_H_


#include <asn_application.h>

/* Including external dependencies */
#include <NativeEnumerated.h>
#include <BIT_STRING.h>
#include <NativeInteger.h>
#include <constr_SEQUENCE.h>

#ifdef __cplusplus
extern "C" {
#endif

/* Dependencies */
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__dynamicSFI {
	ASN_RRC_Phy_ParametersFRX_Diff__dynamicSFI_supported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__dynamicSFI;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__supportedDMRS_TypeDL {
	ASN_RRC_Phy_ParametersFRX_Diff__supportedDMRS_TypeDL_type1	= 0,
	ASN_RRC_Phy_ParametersFRX_Diff__supportedDMRS_TypeDL_type1And2	= 1
} e_ASN_RRC_Phy_ParametersFRX_Diff__supportedDMRS_TypeDL;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__supportedDMRS_TypeUL {
	ASN_RRC_Phy_ParametersFRX_Diff__supportedDMRS_TypeUL_type1	= 0,
	ASN_RRC_Phy_ParametersFRX_Diff__supportedDMRS_TypeUL_type1And2	= 1
} e_ASN_RRC_Phy_ParametersFRX_Diff__supportedDMRS_TypeUL;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__semiOpenLoopCSI {
	ASN_RRC_Phy_ParametersFRX_Diff__semiOpenLoopCSI_supported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__semiOpenLoopCSI;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__csi_ReportWithoutPMI {
	ASN_RRC_Phy_ParametersFRX_Diff__csi_ReportWithoutPMI_supported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__csi_ReportWithoutPMI;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__csi_ReportWithoutCQI {
	ASN_RRC_Phy_ParametersFRX_Diff__csi_ReportWithoutCQI_supported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__csi_ReportWithoutCQI;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__twoPUCCH_F0_2_ConsecSymbols {
	ASN_RRC_Phy_ParametersFRX_Diff__twoPUCCH_F0_2_ConsecSymbols_supported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__twoPUCCH_F0_2_ConsecSymbols;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__pucch_F2_WithFH {
	ASN_RRC_Phy_ParametersFRX_Diff__pucch_F2_WithFH_supported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__pucch_F2_WithFH;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__pucch_F3_WithFH {
	ASN_RRC_Phy_ParametersFRX_Diff__pucch_F3_WithFH_supported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__pucch_F3_WithFH;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__pucch_F4_WithFH {
	ASN_RRC_Phy_ParametersFRX_Diff__pucch_F4_WithFH_supported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__pucch_F4_WithFH;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__freqHoppingPUCCH_F0_2 {
	ASN_RRC_Phy_ParametersFRX_Diff__freqHoppingPUCCH_F0_2_notSupported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__freqHoppingPUCCH_F0_2;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__freqHoppingPUCCH_F1_3_4 {
	ASN_RRC_Phy_ParametersFRX_Diff__freqHoppingPUCCH_F1_3_4_notSupported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__freqHoppingPUCCH_F1_3_4;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__mux_SR_HARQ_ACK_CSI_PUCCH_MultiPerSlot {
	ASN_RRC_Phy_ParametersFRX_Diff__mux_SR_HARQ_ACK_CSI_PUCCH_MultiPerSlot_supported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__mux_SR_HARQ_ACK_CSI_PUCCH_MultiPerSlot;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__uci_CodeBlockSegmentation {
	ASN_RRC_Phy_ParametersFRX_Diff__uci_CodeBlockSegmentation_supported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__uci_CodeBlockSegmentation;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__onePUCCH_LongAndShortFormat {
	ASN_RRC_Phy_ParametersFRX_Diff__onePUCCH_LongAndShortFormat_supported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__onePUCCH_LongAndShortFormat;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__twoPUCCH_AnyOthersInSlot {
	ASN_RRC_Phy_ParametersFRX_Diff__twoPUCCH_AnyOthersInSlot_supported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__twoPUCCH_AnyOthersInSlot;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__intraSlotFreqHopping_PUSCH {
	ASN_RRC_Phy_ParametersFRX_Diff__intraSlotFreqHopping_PUSCH_supported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__intraSlotFreqHopping_PUSCH;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__pusch_LBRM {
	ASN_RRC_Phy_ParametersFRX_Diff__pusch_LBRM_supported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__pusch_LBRM;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__tpc_PUSCH_RNTI {
	ASN_RRC_Phy_ParametersFRX_Diff__tpc_PUSCH_RNTI_supported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__tpc_PUSCH_RNTI;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__tpc_PUCCH_RNTI {
	ASN_RRC_Phy_ParametersFRX_Diff__tpc_PUCCH_RNTI_supported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__tpc_PUCCH_RNTI;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__tpc_SRS_RNTI {
	ASN_RRC_Phy_ParametersFRX_Diff__tpc_SRS_RNTI_supported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__tpc_SRS_RNTI;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__absoluteTPC_Command {
	ASN_RRC_Phy_ParametersFRX_Diff__absoluteTPC_Command_supported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__absoluteTPC_Command;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__twoDifferentTPC_Loop_PUSCH {
	ASN_RRC_Phy_ParametersFRX_Diff__twoDifferentTPC_Loop_PUSCH_supported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__twoDifferentTPC_Loop_PUSCH;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__twoDifferentTPC_Loop_PUCCH {
	ASN_RRC_Phy_ParametersFRX_Diff__twoDifferentTPC_Loop_PUCCH_supported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__twoDifferentTPC_Loop_PUCCH;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__pusch_HalfPi_BPSK {
	ASN_RRC_Phy_ParametersFRX_Diff__pusch_HalfPi_BPSK_supported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__pusch_HalfPi_BPSK;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__pucch_F3_4_HalfPi_BPSK {
	ASN_RRC_Phy_ParametersFRX_Diff__pucch_F3_4_HalfPi_BPSK_supported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__pucch_F3_4_HalfPi_BPSK;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__almostContiguousCP_OFDM_UL {
	ASN_RRC_Phy_ParametersFRX_Diff__almostContiguousCP_OFDM_UL_supported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__almostContiguousCP_OFDM_UL;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__sp_CSI_RS {
	ASN_RRC_Phy_ParametersFRX_Diff__sp_CSI_RS_supported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__sp_CSI_RS;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__sp_CSI_IM {
	ASN_RRC_Phy_ParametersFRX_Diff__sp_CSI_IM_supported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__sp_CSI_IM;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__tdd_MultiDL_UL_SwitchPerSlot {
	ASN_RRC_Phy_ParametersFRX_Diff__tdd_MultiDL_UL_SwitchPerSlot_supported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__tdd_MultiDL_UL_SwitchPerSlot;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__multipleCORESET {
	ASN_RRC_Phy_ParametersFRX_Diff__multipleCORESET_supported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__multipleCORESET;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__ext1__mux_SR_HARQ_ACK_CSI_PUCCH_OncePerSlot__sameSymbol {
	ASN_RRC_Phy_ParametersFRX_Diff__ext1__mux_SR_HARQ_ACK_CSI_PUCCH_OncePerSlot__sameSymbol_supported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__ext1__mux_SR_HARQ_ACK_CSI_PUCCH_OncePerSlot__sameSymbol;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__ext1__mux_SR_HARQ_ACK_CSI_PUCCH_OncePerSlot__diffSymbol {
	ASN_RRC_Phy_ParametersFRX_Diff__ext1__mux_SR_HARQ_ACK_CSI_PUCCH_OncePerSlot__diffSymbol_supported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__ext1__mux_SR_HARQ_ACK_CSI_PUCCH_OncePerSlot__diffSymbol;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__ext1__mux_SR_HARQ_ACK_PUCCH {
	ASN_RRC_Phy_ParametersFRX_Diff__ext1__mux_SR_HARQ_ACK_PUCCH_supported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__ext1__mux_SR_HARQ_ACK_PUCCH;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__ext1__mux_MultipleGroupCtrlCH_Overlap {
	ASN_RRC_Phy_ParametersFRX_Diff__ext1__mux_MultipleGroupCtrlCH_Overlap_supported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__ext1__mux_MultipleGroupCtrlCH_Overlap;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__ext1__dl_SchedulingOffset_PDSCH_TypeA {
	ASN_RRC_Phy_ParametersFRX_Diff__ext1__dl_SchedulingOffset_PDSCH_TypeA_supported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__ext1__dl_SchedulingOffset_PDSCH_TypeA;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__ext1__dl_SchedulingOffset_PDSCH_TypeB {
	ASN_RRC_Phy_ParametersFRX_Diff__ext1__dl_SchedulingOffset_PDSCH_TypeB_supported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__ext1__dl_SchedulingOffset_PDSCH_TypeB;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__ext1__ul_SchedulingOffset {
	ASN_RRC_Phy_ParametersFRX_Diff__ext1__ul_SchedulingOffset_supported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__ext1__ul_SchedulingOffset;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__ext1__dl_64QAM_MCS_TableAlt {
	ASN_RRC_Phy_ParametersFRX_Diff__ext1__dl_64QAM_MCS_TableAlt_supported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__ext1__dl_64QAM_MCS_TableAlt;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__ext1__ul_64QAM_MCS_TableAlt {
	ASN_RRC_Phy_ParametersFRX_Diff__ext1__ul_64QAM_MCS_TableAlt_supported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__ext1__ul_64QAM_MCS_TableAlt;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__ext1__cqi_TableAlt {
	ASN_RRC_Phy_ParametersFRX_Diff__ext1__cqi_TableAlt_supported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__ext1__cqi_TableAlt;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__ext1__oneFL_DMRS_TwoAdditionalDMRS_UL {
	ASN_RRC_Phy_ParametersFRX_Diff__ext1__oneFL_DMRS_TwoAdditionalDMRS_UL_supported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__ext1__oneFL_DMRS_TwoAdditionalDMRS_UL;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__ext1__twoFL_DMRS_TwoAdditionalDMRS_UL {
	ASN_RRC_Phy_ParametersFRX_Diff__ext1__twoFL_DMRS_TwoAdditionalDMRS_UL_supported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__ext1__twoFL_DMRS_TwoAdditionalDMRS_UL;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__ext1__oneFL_DMRS_ThreeAdditionalDMRS_UL {
	ASN_RRC_Phy_ParametersFRX_Diff__ext1__oneFL_DMRS_ThreeAdditionalDMRS_UL_supported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__ext1__oneFL_DMRS_ThreeAdditionalDMRS_UL;
typedef enum ASN_RRC_Phy_ParametersFRX_Diff__ext2__mux_HARQ_ACK_PUSCH_DiffSymbol {
	ASN_RRC_Phy_ParametersFRX_Diff__ext2__mux_HARQ_ACK_PUSCH_DiffSymbol_supported	= 0
} e_ASN_RRC_Phy_ParametersFRX_Diff__ext2__mux_HARQ_ACK_PUSCH_DiffSymbol;

/* Forward declarations */
struct ASN_RRC_CSI_RS_IM_ReceptionForFeedback;
struct ASN_RRC_CSI_RS_ProcFrameworkForSRS;
struct ASN_RRC_CSI_ReportFramework;

/* ASN_RRC_Phy-ParametersFRX-Diff */
typedef struct ASN_RRC_Phy_ParametersFRX_Diff {
	long	*dynamicSFI;	/* OPTIONAL */
	BIT_STRING_t	*dummy1;	/* OPTIONAL */
	BIT_STRING_t	*twoFL_DMRS;	/* OPTIONAL */
	BIT_STRING_t	*dummy2;	/* OPTIONAL */
	BIT_STRING_t	*dummy3;	/* OPTIONAL */
	long	*supportedDMRS_TypeDL;	/* OPTIONAL */
	long	*supportedDMRS_TypeUL;	/* OPTIONAL */
	long	*semiOpenLoopCSI;	/* OPTIONAL */
	long	*csi_ReportWithoutPMI;	/* OPTIONAL */
	long	*csi_ReportWithoutCQI;	/* OPTIONAL */
	BIT_STRING_t	*onePortsPTRS;	/* OPTIONAL */
	long	*twoPUCCH_F0_2_ConsecSymbols;	/* OPTIONAL */
	long	*pucch_F2_WithFH;	/* OPTIONAL */
	long	*pucch_F3_WithFH;	/* OPTIONAL */
	long	*pucch_F4_WithFH;	/* OPTIONAL */
	long	*freqHoppingPUCCH_F0_2;	/* OPTIONAL */
	long	*freqHoppingPUCCH_F1_3_4;	/* OPTIONAL */
	long	*mux_SR_HARQ_ACK_CSI_PUCCH_MultiPerSlot;	/* OPTIONAL */
	long	*uci_CodeBlockSegmentation;	/* OPTIONAL */
	long	*onePUCCH_LongAndShortFormat;	/* OPTIONAL */
	long	*twoPUCCH_AnyOthersInSlot;	/* OPTIONAL */
	long	*intraSlotFreqHopping_PUSCH;	/* OPTIONAL */
	long	*pusch_LBRM;	/* OPTIONAL */
	long	*pdcch_BlindDetectionCA;	/* OPTIONAL */
	long	*tpc_PUSCH_RNTI;	/* OPTIONAL */
	long	*tpc_PUCCH_RNTI;	/* OPTIONAL */
	long	*tpc_SRS_RNTI;	/* OPTIONAL */
	long	*absoluteTPC_Command;	/* OPTIONAL */
	long	*twoDifferentTPC_Loop_PUSCH;	/* OPTIONAL */
	long	*twoDifferentTPC_Loop_PUCCH;	/* OPTIONAL */
	long	*pusch_HalfPi_BPSK;	/* OPTIONAL */
	long	*pucch_F3_4_HalfPi_BPSK;	/* OPTIONAL */
	long	*almostContiguousCP_OFDM_UL;	/* OPTIONAL */
	long	*sp_CSI_RS;	/* OPTIONAL */
	long	*sp_CSI_IM;	/* OPTIONAL */
	long	*tdd_MultiDL_UL_SwitchPerSlot;	/* OPTIONAL */
	long	*multipleCORESET;	/* OPTIONAL */
	/*
	 * This type is extensible,
	 * possible extensions are below.
	 */
	struct ASN_RRC_Phy_ParametersFRX_Diff__ext1 {
		struct ASN_RRC_CSI_RS_IM_ReceptionForFeedback	*csi_RS_IM_ReceptionForFeedback;	/* OPTIONAL */
		struct ASN_RRC_CSI_RS_ProcFrameworkForSRS	*csi_RS_ProcFrameworkForSRS;	/* OPTIONAL */
		struct ASN_RRC_CSI_ReportFramework	*csi_ReportFramework;	/* OPTIONAL */
		struct ASN_RRC_Phy_ParametersFRX_Diff__ext1__mux_SR_HARQ_ACK_CSI_PUCCH_OncePerSlot {
			long	*sameSymbol;	/* OPTIONAL */
			long	*diffSymbol;	/* OPTIONAL */
			
			/* Context for parsing across buffer boundaries */
			asn_struct_ctx_t _asn_ctx;
		} *mux_SR_HARQ_ACK_CSI_PUCCH_OncePerSlot;
		long	*mux_SR_HARQ_ACK_PUCCH;	/* OPTIONAL */
		long	*mux_MultipleGroupCtrlCH_Overlap;	/* OPTIONAL */
		long	*dl_SchedulingOffset_PDSCH_TypeA;	/* OPTIONAL */
		long	*dl_SchedulingOffset_PDSCH_TypeB;	/* OPTIONAL */
		long	*ul_SchedulingOffset;	/* OPTIONAL */
		long	*dl_64QAM_MCS_TableAlt;	/* OPTIONAL */
		long	*ul_64QAM_MCS_TableAlt;	/* OPTIONAL */
		long	*cqi_TableAlt;	/* OPTIONAL */
		long	*oneFL_DMRS_TwoAdditionalDMRS_UL;	/* OPTIONAL */
		long	*twoFL_DMRS_TwoAdditionalDMRS_UL;	/* OPTIONAL */
		long	*oneFL_DMRS_ThreeAdditionalDMRS_UL;	/* OPTIONAL */
		
		/* Context for parsing across buffer boundaries */
		asn_struct_ctx_t _asn_ctx;
	} *ext1;
	struct ASN_RRC_Phy_ParametersFRX_Diff__ext2 {
		struct ASN_RRC_Phy_ParametersFRX_Diff__ext2__pdcch_BlindDetectionNRDC {
			long	 pdcch_BlindDetectionMCG_UE;
			long	 pdcch_BlindDetectionSCG_UE;
			
			/* Context for parsing across buffer boundaries */
			asn_struct_ctx_t _asn_ctx;
		} *pdcch_BlindDetectionNRDC;
		long	*mux_HARQ_ACK_PUSCH_DiffSymbol;	/* OPTIONAL */
		
		/* Context for parsing across buffer boundaries */
		asn_struct_ctx_t _asn_ctx;
	} *ext2;
	
	/* Context for parsing across buffer boundaries */
	asn_struct_ctx_t _asn_ctx;
} ASN_RRC_Phy_ParametersFRX_Diff_t;

/* Implementation */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_dynamicSFI_2;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_supportedDMRS_TypeDL_8;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_supportedDMRS_TypeUL_11;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_semiOpenLoopCSI_14;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_csi_ReportWithoutPMI_16;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_csi_ReportWithoutCQI_18;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_twoPUCCH_F0_2_ConsecSymbols_21;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_pucch_F2_WithFH_23;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_pucch_F3_WithFH_25;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_pucch_F4_WithFH_27;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_freqHoppingPUCCH_F0_2_29;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_freqHoppingPUCCH_F1_3_4_31;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_mux_SR_HARQ_ACK_CSI_PUCCH_MultiPerSlot_33;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_uci_CodeBlockSegmentation_35;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_onePUCCH_LongAndShortFormat_37;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_twoPUCCH_AnyOthersInSlot_39;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_intraSlotFreqHopping_PUSCH_41;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_pusch_LBRM_43;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_tpc_PUSCH_RNTI_46;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_tpc_PUCCH_RNTI_48;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_tpc_SRS_RNTI_50;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_absoluteTPC_Command_52;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_twoDifferentTPC_Loop_PUSCH_54;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_twoDifferentTPC_Loop_PUCCH_56;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_pusch_HalfPi_BPSK_58;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_pucch_F3_4_HalfPi_BPSK_60;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_almostContiguousCP_OFDM_UL_62;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_sp_CSI_RS_64;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_sp_CSI_IM_66;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_tdd_MultiDL_UL_SwitchPerSlot_68;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_multipleCORESET_70;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_sameSymbol_78;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_diffSymbol_80;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_mux_SR_HARQ_ACK_PUCCH_82;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_mux_MultipleGroupCtrlCH_Overlap_84;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_dl_SchedulingOffset_PDSCH_TypeA_86;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_dl_SchedulingOffset_PDSCH_TypeB_88;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_ul_SchedulingOffset_90;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_dl_64QAM_MCS_TableAlt_92;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_ul_64QAM_MCS_TableAlt_94;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_cqi_TableAlt_96;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_oneFL_DMRS_TwoAdditionalDMRS_UL_98;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_twoFL_DMRS_TwoAdditionalDMRS_UL_100;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_oneFL_DMRS_ThreeAdditionalDMRS_UL_102;	// (Use -fall-defs-global to expose) */
/* extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_mux_HARQ_ACK_PUSCH_DiffSymbol_108;	// (Use -fall-defs-global to expose) */
extern asn_TYPE_descriptor_t asn_DEF_ASN_RRC_Phy_ParametersFRX_Diff;
extern asn_SEQUENCE_specifics_t asn_SPC_ASN_RRC_Phy_ParametersFRX_Diff_specs_1;
extern asn_TYPE_member_t asn_MBR_ASN_RRC_Phy_ParametersFRX_Diff_1[39];

#ifdef __cplusplus
}
#endif

#endif	/* _ASN_RRC_Phy_ParametersFRX_Diff_H_ */
#include <asn_internal.h>
